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| 08:30-09:00 |
Room open, coffee served |
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| 09:00-09:20 |
RISC-V Update - Slides Video |
Christopher Celio |
| 09:20-09:50 |
BOOM: A Superscalar Out-of-order RISC-V Processor - Slides Video |
Christopher Celio |
| 10:00-10:40 |
PULP: an open source Parallel Ultra-Low-Power computing platform - Video |
Davide Rossi |
| 10:50-11:30 |
GAP8: A PULP/RISC-V based SoC IoT processor - Video |
Eric Flamand |
| 11:40-11:50 |
A SoC for biomedical signal acquisition and processing based on the PULP platform - Video |
Giovanni Rovere |
| 11:50-12:30 |
A fully-tested 32-bit RISC-V microcontroller in 130nm and board development - Video |
Elkim Roa |
| 12:30-14:00 |
Lunch |
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| 14:00-14:30 |
The ZipCPU: A resource efficient 32-bit SoftCore - Video |
Dan Gisselquist |
| 14:40-15:10 |
OpenPiton: A Full-Stack Open Source Manycore - Video |
Jonathan Balkind |
| 15:20-15:50 |
Application development co-design for FPGA-accelerated data center HPC servers - slides Video |
Mihai Lazarescu |
| 15:50-16:00 |
LibreCores Design Content presentations - OpenTimer Video Potstill Video |
Tsung-Wei Huang, Fabian Schuiki |
| 16:00-16:30 |
Break |
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| 16:30-17:10 |
VDT - Free Software Environment for FPGA Development - Video |
Andrey N. Filippov |
| 17:20-17:50 |
Automating Hardware Projects with Jenkins - Video |
Oleg Nenashev |
| 18:00-18:30 |
LibreCores launch and demo - Slides Video |
Philipp Wagner |
| 18:30-19:30 |
Pre-dinner break, mingle |
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| 19:30- |
Dinner |
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