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| 08:00 |
Registration open at Town Hall, coffee served |
| 09:00 |
FOSSi Foundation update - FOSSi Foundation - Slides - Video |
| 09:30 |
LibreCores - your source for free and open digital hardware - Philipp Wagner - Slides - Video |
| 10:00 |
State of LibreCores CI - Stefan Wallentowitz and Oleg Nenashev - Slides - Video |
| 10:30 |
Poster presentations + Break |
| 11:00 |
The CERN OHL v2 and copyleft licences for HDL - Andrew Katz - Video |
| 11:30 |
AutoFPGA: An FPGA Component Aggregator - Dan Gisselquist - Slides - Video |
| 12:00 |
chips4makers - Staf Verhaegen - Slides - Video |
| 12:30 |
Lunch |
| 14:00 |
End-to-end formal ISA verification of RISC-V processors with riscv-formal - Clifford Wolf - Slides - Video |
| 14:30 |
Open Circuit Design - R. Timothy Edwards - Slides - Video |
| 15:00 |
lowRISC project update - Alex Bradbury - Video |
| 15:30 |
Sequential Consistency on lowRISC - Mahircan Gul - Slides - Video |
| 15:50 |
Lightning talks: ZipCPU update - Slides - Video, What the Heck is System Hyper Pipelining? - Slide Video, FuseSoc - Video, myStorm - Video |
| 16:00 |
Break |
| 16:30 |
Open SoC Debug: Reusable debug and trace components with added value - Philipp Wagner - Slides - Video |
| 17:00 |
Experience report: Bringing up cycle-accurate models of RISC-V cores - Graham Markall - Video |
| 17:30 |
RFC: Is open source from Venus and commercial from Mars? - Staf Verhaegen - Slides - Video |
| 18:00 |
Pre-dinner break, mingle |
| 19:00 |
Dinner |
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